module cond(
    /*AUTOARG*/
   // Outputs
   e_cnd,
   // Inputs
   E_ifun, e_cc
   );

input [3:0] E_ifun; 
input [2:0] e_cc; 
output e_cnd; 

wire zf = e_cc[2]; 
wire sf = e_cc[1]; 
wire of = e_cc[0]; 

// Reference pipe.v
assign e_cnd = 
    (E_ifun == `C_YES) | // all 
    (E_ifun == `C_LE & ((sf^of)|zf)) | // <= 
    (E_ifun == `C_L & (sf^of)) | // < 
    (E_ifun == `C_E & zf) | // == 
    (E_ifun == `C_NE & ~zf) | // != 
    (E_ifun == `C_GE & (~sf^of)) | // >= 
    (E_ifun == `C_G & (~sf^of)&~zf); // >

endmodule 
